Package io.matita08.logic

package io.matita08.logic

CPU logic and execution engine package for the simulator.

This package implements the core execution logic of the CPU simulator, providing the fetch-decode-execute cycle, operation management, and instruction processing capabilities. It serves as the "brain" of the simulated processor.

Core Components:

• Execution - Main execution engine implementing CPU cycle
• Operation - Operation wrapper with dynamic instruction loading
• Phase - Execution phase enumeration (Fetch, Decode, Execute)
• Operations3Bit - 3-bit instruction set implementation
• Operations4Bit - 4-bit instruction set implementation

Execution Model:

• Step-by-Step Execution: Single-step and continuous execution modes
• Multi-Cycle Operations: Realistic timing with variable cycle counts
• Phase-Based Processing: Clear separation of fetch, decode, and execute phases
• Dynamic Instruction Loading: Reflection-based operation set loading
• Memory Integration: Seamless interaction with register and memory systems

Supported Instruction Sets:

• 3-Bit ISA: Basic instruction set with essential operations (LOAD, STO, ADD, etc.)
• 4-Bit ISA: Extended instruction set with additional operations (SUB, JMP, conditional jumps)

Fetch-Decode-Execute Cycle:

1. Fetch Phase:
   • Read instruction from memory at PC address
   • Store instruction in IR register
   • Increment PC to next instruction
2. Decode Phase:
   • Interpret instruction opcode
   • Look up operation definition
   • Prepare operands and timing
3. Execute Phase:
   • Perform operation-specific actions
   • Update registers and memory
   • Set appropriate CPU flags

Dynamic Operation Loading:

The execution engine uses Java reflection to dynamically load instruction set definitions, allowing for different CPU architectures without modifying the core execution logic. Operation classes must implement the expected interface with proper static methods and fields.

Integration with Other Packages:

• Data Package: Direct access to registers, memory, and CPU state
• GUI Package: Execution control through step buttons and state display
• Value Package: Arithmetic operations and data type handling

Educational Value:

The logic package demonstrates fundamental computer science concepts:

• How instructions are fetched from memory and decoded
• The role of the program counter in sequential execution
• Multi-cycle instruction timing and pipeline concepts
• Control unit coordination of CPU components
• Memory addressing modes and data access patterns

Since:

1.0

Related Packages

Package	Description
io.matita08	Root package for the CPU Simulator application.
io.matita08.data	Data management package for the CPU simulator.
io.matita08.GUI	Graphical User Interface (GUI) package for the CPU Simulator application.
io.matita08.value	Value system package for the CPU simulator.

Class	Description
Execution	CPU Execution Engine - Instruction Cycle Management.
Operation	Represents a CPU operation/instruction in the simulator with dynamic loading capabilities.
Operations3Bit	3-Bit CPU Instruction Set Implementation.
Operations4Bit	4-Bit CPU Instruction Set Implementation.
Phase	CPU Execution Phases - Instruction Cycle States.