Enum Class Operations3Bit
- All Implemented Interfaces:
Serializable,Comparable<Operations3Bit>,Constable
This enum defines a complete instruction set for a 3-bit CPU architecture, implementing common operations such as memory access, arithmetic, I/O, and control flow instructions.
Instruction Set:
- STO (0) - Store accumulator to memory address
- LOAD (1) - Load value from memory address to accumulator
- OUT (2) - Output accumulator value to output buffer
- IN (3) - Input value from input buffer to accumulator
- ADD (4) - Add RegB to accumulator with flag updates
- SET (5) - Copy accumulator value to RegB
- JPZ (6) - Jump to address if zero flag is set
- HALT (7) - Stop CPU execution
Each instruction is implemented with multi-cycle execution support, handling address reading and memory operations across multiple CPU cycles.
- Since:
- 1.0
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Nested Class Summary
Nested classes/interfaces inherited from class java.lang.Enum
Enum.EnumDesc<E extends Enum<E>> -
Enum Constant Summary
Enum ConstantsEnum ConstantDescriptionADD (Addition) - Opcode 4.HALT (Halt Execution) - Opcode 7.IN (Input) - Opcode 3.JPZ (Jump if Zero) - Opcode 6.LOAD (Load) - Opcode 1.OUT (Output) - Opcode 2.SET (Set Register B) - Opcode 5.STO (Store) - Opcode 0.UNKNOWN (Invalid Opcode Handler). -
Field Summary
FieldsModifier and TypeFieldDescriptionstatic final Operations3Bit[]Array containing all available operations in this instruction set.final OperationThe Operation wrapper object that provides the execution interface. -
Method Summary
Modifier and TypeMethodDescriptionget()Gets the Operation wrapper for this instruction.static OperationgetHalt()Gets the HALT operation for CPU termination.static OperationGets the UNKNOWN operation for invalid opcodes.static Operations3BitReturns the enum constant of this class with the specified name.static Operations3Bit[]values()Returns an array containing the constants of this enum class, in the order they are declared.
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Enum Constant Details
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sto
STO (Store) - Opcode 0.Stores the current accumulator value to the memory address specified by the pointer register. This is a multi-cycle operation that first reads the target address, then performs the memory write.
Execution cycles: 1 + address size (typically 3 cycles total)
- Cycles 2-N: Read pointer address from memory
- Cycle 1: Store accumulator to memory[pointer]
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load
LOAD (Load) - Opcode 1.Loads a value from the memory address specified by the pointer register into the accumulator. This is a multi-cycle operation that first reads the target address, then performs the memory read.
Execution cycles: 1 + address size (typically 3 cycles total)
- Cycles 2-N: Read pointer address from memory
- Cycle 1: Load memory[pointer] into accumulator
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out
OUT (Output) - Opcode 2.Copies the current accumulator value to the output buffer register. This provides the interface between the CPU and output devices.
Execution cycles: 1 (single-cycle operation)
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in
IN (Input) - Opcode 3.Copies the current input buffer value to the accumulator register. This provides the interface between input devices and the CPU.
Execution cycles: 1 (single-cycle operation)
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add
ADD (Addition) - Opcode 4.Performs arithmetic addition of the accumulator and RegB, storing the result in the accumulator. Updates the Zero and Overflow flags based on the result.
Flag Updates:
- Overflow flag: Set if result exceeds maximum value
- Zero flag: Set if result equals zero
Execution cycles: 1 (single-cycle operation)
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set
SET (Set Register B) - Opcode 5.Copies the current accumulator value to RegB. This is typically used to prepare operands for arithmetic operations.
Execution cycles: 1 (single-cycle operation)
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jpz
JPZ (Jump if Zero) - Opcode 6.Conditional jump instruction that jumps to the specified address if the Zero flag is set. If the flag is not set, execution continues with the next instruction.
Execution cycles: 1 + address size (typically 3 cycles total)
- Cycles N-2: Read target address from memory
- Cycle 1: Check Zero flag and jump if set, otherwise continue
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Halt
HALT (Halt Execution) - Opcode 7.Stops CPU execution. This instruction causes the CPU to enter a halted state where no further instructions are processed.
Execution cycles: 1 (single-cycle operation)
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Unknown
UNKNOWN (Invalid Opcode Handler).Special operation used as a fallback for invalid or unrecognized opcodes. Provides graceful handling of instruction decode errors.
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Field Details
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all
Array containing all available operations in this instruction set. -
wrapper
The Operation wrapper object that provides the execution interface.
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Method Details
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values
Returns an array containing the constants of this enum class, in the order they are declared.- Returns:
- an array containing the constants of this enum class, in the order they are declared
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valueOf
Returns the enum constant of this class with the specified name. The string must match exactly an identifier used to declare an enum constant in this class. (Extraneous whitespace characters are not permitted.)- Parameters:
name- the name of the enum constant to be returned.- Returns:
- the enum constant with the specified name
- Throws:
IllegalArgumentException- if this enum class has no constant with the specified nameNullPointerException- if the argument is null
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get
Gets the Operation wrapper for this instruction.- Returns:
- the Operation object containing execution logic and metadata
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getHalt
Gets the HALT operation for CPU termination.- Returns:
- the HALT operation wrapper
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getUnknown
Gets the UNKNOWN operation for invalid opcodes.- Returns:
- the UNKNOWN operation wrapper
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